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a
ESD Protected, EMC Compliant, 3.3 V, 20 Mbps, EIA RS-485 Transceiver ADM3485E
FUNCTIONAL BLOCK DIAGRAM
ADM3485E
FEATURES Operates with +3.3 V Supply ESD Protection: 8 kV Meets IEC1000-4-2 EFT Protection: 2 kV Meets IEC1000-4-4 EIA RS-422 and RS-485 Compliant Over Full CM Range 19 k Input Impedance Up to 50 Transceivers on Bus 20 Mbps Data Rate Short Circuit Protection Specified Over Full Temperature Range Thermal Shutdown Interoperable with 5 V Logic 1 mA Supply Current 2 nA Shutdown Current 8 ns Skew APPLICATIONS Telecommunications DTE-DCE Interface Packet Switching Local Area Networks Data Concentration Data Multiplexers Integrated Services Digital Network (ISDN) AppleTalk Industrial Controls
RO
R
RE
B
DE
A
DI
D
GENERAL DESCRIPTION
The ADM3485E is a low power differential line transceiver designed to operate using a single +3.3 V power supply. Low power consumption makes it ideal for power sensitive applications. It is suitable for communication on multipoint bus transmission lines. Internal protection against electrostatic discharge (ESD) and electrical fast transient (EFT) allows operation in electrically harsh environments. It is intended for balanced data transmission and complies with both EIA Standards RS-485 and RS-422. It contains a differential line driver and a differential line receiver, and is suitable for half duplex data transfer. The input impedance is 19 k allowing up to 50 transceivers to be connected on the bus.
Excessive power dissipation caused by bus contention or by output shorting is prevented by a thermal shutdown circuit. This feature forces the driver output into a high impedance state if, during fault conditions, a significant temperature increase is detected in the internal driver circuitry. The receiver contains a fail-safe feature that results in a logic high output state if the inputs are unconnected (floating). The ADM3485E is fabricated on BiCMOS, an advanced mixed technology process combining low power CMOS with fast switching bipolar technology. The ADM3485E is fully specified over the industrial temperature range and is available in 8-lead DIP and SOIC packages.
REV. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 (c) Analog Devices, Inc., 2000
ADM3485E-SPECIFICATIONS (V
Parameter DRIVER Differential Output Voltage, VOD Min 2.0 1.5 1.5
CC
= +3.3 V
Typ
0.3 V. All specifications TMIN to TMAX unless otherwise noted.)
Max Units V V V V V V V V A mA V mV k mA mA A V V mA A Test Conditions/Comments RL = 100 , Figure 1, VCC > 3.1 V RL = 54 , Figure 1 RL = 60 , Figure 2, -7 V < VTST < +12 V R = 54 or 100 , Figure 1 R = 54 or 100 , Figure 1 R = 54 or 100 , Figure 1
|VOD| for Complementary Output States Common-Mode Output Voltage VOC |VOC| for Complementary Output States CMOS Input Logic Threshold Low, VINL CMOS Input Logic Threshold High, VINH 2.0 Logic Input Current (DE, DI, RE) Output Short Circuit Current RECEIVER Differential Input Threshold Voltage, VTH Input Voltage Hysteresis, VTH Input Resistance Input Current (A, B) Logic Enable Input Current (RE) Output Voltage Low, VOL Output Voltage High, VOH Short Circuit Output Current Three-State Output Leakage Current POWER SUPPLY CURRENT ICC Supply Current in Shutdown ESD/EFT IMMUNITY ESD Protection EFT Protection
Specifications subject to change without notice.
0.2 3 0.2 0.8 1.0 250 +0.2 50 19 +1 -0.8 1 0.4
VO = -7 V or +12 V -7 V < VCM < +12 V VCM = 0 V -7 V < VCM < +12 V VIN = +12 V VIN = -7 V IOUT = +2.5 mA IOUT = -1.5 mA VOUT = GND or VCC VCC = 3.6 V, 0 V < VOUT < VCC Outputs Unloaded, DE = VCC, RE = 0 V DE = 0 V, RE = 0 V DE = 0 V, RE = VCC IEC1000-4-2 A, B Pins Contact Discharge IEC1000-4-4, A, B Pins
-0.2 12
VCC - 0.4 V
60 1.0
1 1.2 1 1.2 0.002 1 8 2
mA mA A kV kV
-2-
REV. A
ADM3485E TIMING SPECIFICATIONS (V
Parameter DRIVER Differential Output Delay TDD Differential Output Transition Time Propagation Delay Input to Output TPLH, TPHL Driver O/P to O/P TSKEW ENABLE/DISABLE Driver Enable to Output Valid Driver Disable Timing Driver Enable from Shutdown RECEIVER Time to Shutdown Propagation Delay Input to Output TPLH, TPHL Skew TPLH-TPHL Receiver Enable TEN Receiver Disable TDEN Receiver Enable from Shutdown
Specifications subject to change without notice.
CC
= +3.3 V, TA = +25 C)
Min 1 1 7 Typ Max 35 15 35 8 90 80 110 300 90 10 50 45 500 Units ns ns ns ns ns ns ns ns ns ns ns ns ns Test Conditions/ Comments RL = 60 , CL1 = CL2 = 15 pF, Figure 3 RL = 60 , CL1 = CL2 = 15 pF, Figure 3 RL = 27 , CL1 = CL2 = 15 pF, Figure 7 RL = 54 , CL1 = CL2 = 15 pF, Figure 3 RL = 110 , CL = 50 pF, Figure 2 RL = 110 , CL = 50 pF, Figure 2 RL = 110 , CL = 15 pF, Figure 2
8 22
45 40 650 80 25 190 65 25 25
CL = 15 pF, Figure 8 CL = 15 pF, Figure 8 CL = 15 pF, Figure 6 CL = 15 pF, Figure 6 CL = 15 pF, Figure 6
TIMING SPECIFICATIONS (V
Parameter
CC
= +3.3 V
0.3 V, TA = TMIN to TMAX)
Min 1 2 7 Typ Max 70 15 70 10 110 110 110 500 115 20 50 50 600 Units ns ns ns ns ns ns ns ns ns ns ns ns ns Test Conditions/ Comments RL = 60 , CL1 = CL2 = 15 pF, Figure 3 RL = 60 , CL1 = CL2 = 15 pF, Figure 3 RL = 27 , CL1 = CL2 = 15 pF, Figure 7 RL = 54 , CL1 = CL2 = 15 pF, Figure 3 RL = 110 , CL = 50 pF, Figure 2 RL = 110 , CL = 50 pF, Figure 2 RL = 110 , CL = 15 pF, Figure 2
DRIVER Differential Output Delay TDD Differential Output Transition Time Propagation Delay Input to Output TPLH, TPHL Driver O/P to O/P TSKEW ENABLE/DISABLE Driver Enable to Output Valid Driver Disable Timing Driver Enable from Shutdown RECEIVER Time to Shutdown Propagation Delay Input to Output TPLH, TPHL Skew TPLH-TPHL Receiver Enable TEN Receiver Disable TDEN Receiver Enable from Shutdown
Specifications subject to change without notice.
8 22
45 40 650 50 25 190 65 25 25
CL = 15 pF, Figure 8 CL = 15 pF, Figure 8 CL = 15 pF, Figure 6 CL = 15 pF, Figure 6 CL = 15 pF, Figure 6
REV. A
-3-
ADM3485E
ABSOLUTE MAXIMUM RATINGS*
(TA = +25C unless otherwise noted)
VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +7 V Inputs Driver Input (DI) . . . . . . . . . . . . . . . . -0.3 V to VCC + 0.3 V Control Inputs (DE, RE) . . . . . . . . . . -0.3 V to VCC + 0.3 V Receiver Inputs (A, B) . . . . . . . . . . . . . . . -7.5 V to +12.5 V Outputs Driver Outputs . . . . . . . . . . . . . . . . . . . . . -7.5 V to +12.5 V Receiver Output . . . . . . . . . . . . . . . . . -0.5 V to VCC + 0.5 V Power Dissipation 8-Lead DIP . . . . . . . . . . . . . . . . . 800 mW JA, Thermal Impedance . . . . . . . . . . . . . . . . . . . . 140C/W Power Dissipation 8-Lead SOIC . . . . . . . . . . . . . . . . 650 mW JA, Thermal Impedance . . . . . . . . . . . . . . . . . . . . 115C/W
Operating Temperature Range Industrial (A Version) . . . . . . . . . . . . . . . . -40C to +85C Storage Temperature Range . . . . . . . . . . . . -65C to +150C Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . . +300C Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . +215C Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . +220C ESD Rating: Air (Human Body Model, All Pins) . . . . . >4 kV ESD Rating: IEC1000-4-2 Contact (A, B Pins) . . . . . . >8 kV EFT Rating: IEC1000-4-4 (A, B Pins) . . . . . . . . . . . . . >2 kV
*Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum ratings for extended periods of time may affect device reliability.
ORDERING GUIDE
Model ADM3485EAN ADM3485EAR
Temperature Range -40C to +85C -40C to +85C
Package Description Plastic DIP Small Outline (SOIC)
PIN CONFIGURATION DIP/SOIC
Package Options N-8 SO-8
RO 1
8
VCC
RE 2 ADM3485E 7 B DE 3 DI 4 TOP VIEW 6 A (Not to Scale) 5 GND
PIN FUNCTION DESCRIPTIONS
Mnemonic Pin RO RE DE DI GND A B VCC
DIP/ SOIC 1 2 3 4 5 6 7 8
Function Receiver Output. High when A > B by 200 mV or low when A < B by 200 mV. Receiver Output Enable. With RE low, the receiver output RO is enabled. With RE high, the output goes high impedance. If RE is high and DE low, the ADM3485E enters a shutdown state. Driver Output Enable. A high level enables the driver differential outputs, A and B. A low level places it in a high impedance state. Driver Input. When the driver is enabled, a logic low on DI forces A low and B high, while a logic high on DI forces A high and B low. Ground Connection, 0 V. Noninverting Receiver Input A/Driver Output A. Inverting Receiver Input B/Driver Output B. Power Supply, 3.3 V 0.3 V.
-4-
REV. A
ADM3485E Test Circuits
375
R/2 VOD R/2 VCC
375
VOC
VOD3
RL
VTST
Figure 1. Driver Voltage Measurement Test Circuit
Figure 5. Driver Voltage Measurement Test Circuit 2
VCC
VCC +1.5V S1 RL RE CL VOUT
0V OR 3V
DE
S1
RL CL VOUT
S2
-1.5V
S2
DE IN
RE IN
Figure 2. Driver Enable/Disable Test Circuit
Figure 6. Receiver Enable/Disable Test Circuit
VOM RL
DI CL1 D RLDIFF CL2 VOUT
IN
DE
S1 CL
VOUT
VCC
Figure 3. Driver Differential Output Delay Test Circuit
Figure 7. Driver Propagation Delay Test Circuit
DI
CL1 D RLDIFF CL2
A B R RE RO
0V
3V VID +1.5V VOUT RE CL
Figure 4. Driver/Receiver Propagation Delay Test Circuit
Figure 8. Receiver Propagation Delay Test Circuit
REV. A
-5-
ADM3485E Switching Characteristics
3V 1.5V 0V 1.5V
3V DE 1.5V 1.5V 0V
tPLH tPLH
B VO A VO 0V -VO
1/2 VO
tZL
D 1.5V
tLZ
tSKEW
90% POINT
tSKEW
90% POINT 10% POINT
O/P LOW
VOL + 0.25V VOL
tZH
D 1.5V 0V O/P HIGH
tHZ
VOH VOH - 0.25V
10% POINT
tR
tF
Figure 9. Driver Propagation Delay, Rise/Fall Timing
Figure 11. Driver Enable/Disable Timing
3V RE 1.5V 1.5V 0V
A-B
0V
0V
tZL
tPLH
R 1.5V
tLZ
tPLH
O/P LOW
VOL + 0.25V VOL
VOH RO 1.5V 1.5V VOL
tZH
R 1.5V 0V O/P HIGH
tHZ
VOH VOH - 0.25V
Figure 10. Receiver Propagation Delay
Figure 12. Receiver Enable/Disable Timing
-6-
REV. A
Typical Performance Characteristics-ADM3485E
14 12 OUTPUT CURRENT - mA 10
OUTPUT CURRENT - mA
12
10
8
8 6
6
4
4 2 0 0 0.5 1.5 2.5 1.0 2.0 OUTPUT LOW VOLTAGE - V 3.0 3.5
2
0 0 0.5 1.5 2.5 1.0 2.0 OUTPUT HIGH VOLTAGE - V 3.0 3.5
Figure 13. Output Current vs. Receiver Output Low Voltage
Figure 16. Output Current vs. Receiver Output High Voltage
0.8
3.30 3.25 3.20 3.15 3.10 3.05 3.00 2.95 2.90 -50
RECEIVER OUTPUT LOW VOLTAGE - V
0.6
0.5 0.4
0.3 0.2 0.1 -50
-30
-10
10
30
50
70
90
110
RECEIVER O/P HIGH VOLTAGE - V
0.7
-30
-10
TEMPERATURE - C
10 30 50 70 TEMPERATURE - C
90
110
Figure 14. Receiver Output Low Voltage vs. Temperature
Figure 17. Receiver Output High Voltage vs. Temperature
120
2.6 2.5
DRIVER OUTPUT CURRENT - mA
100
2.4 2.3
VOD - V
80
2.2 2.1 2.0
60
40
1.9 1.8 1.7
20
0 0 0.5 1.5 2.5 1.0 2.0 DIFFERENTIAL OUTPUT VOLTAGE - V 3.0
1.6 -50
-30
-10
10 30 50 70 TEMPERATURE - C
90
110
Figure 15. Driver Output Current vs. Differential Output Voltage
Figure 18. Driver Differential Output Voltage vs. Temperature
REV. A
-7-
ADM3485E
1.20 1.15 1.10 1.05
ICC - mA
100 90 80 70 ICC (mA) DE = VCC, RE = X
ICC - nA
1.00 0.95 0.90 0.85 0.80 0.75 0.70 -50
60 50 40 30 20 10 0 -40 ICC (mA)
ICC (mA) RE = LO, DE = LO
-30
-10
10 30 50 70 TEMPERATURE - C
90
110
-20
0
20 40 TEMPERATURE - C
60
80
Figure 19. Supply Current vs. Temperature
Figure 20. Shutdown Current vs. Temperature
Table I. Comparison of RS-422 and RS-485 Interface Standards
ESD/EFT TRANSIENT PROTECTION SCHEME
Specification Transmission Type Maximum Data Rate Maximum Cable Length Minimum Driver Output Voltage Driver Load Impedance Receiver Input Resistance Receiver Input Sensitivity Receiver Input Voltage Range No. of Drivers/Receivers Per Line
RS-422 Differential 10 MB/s 4000 ft. 2 V 100 4 k min 200 mV -7 V to +7 V 1/10
RS-485 Differential 10 MB/s 4000 ft. 1.5 V 54 12 k min 200 mV -7 V to +12 V 32/32
The ADM3485E uses protective clamping structures on its inputs and outputs that clamp the voltage to a safe level and dissipate the energy present in ESD (Electrostatic) and EFT (Electrical Fast Transients) discharges. The protection structure achieves ESD protection up to 8 kV according to IEC1000-4-2, and EFT protection up to 2 kV on all I-O lines.
ESD TESTING
Table II. Transmitting Truth Table
Transmitting Inputs RE X X 0 1 DE 1 1 0 0 DI 1 0 X X B 0 1 Hi-Z Hi-Z Outputs A 1 0 Hi-Z Hi-Z
Two coupling methods are used for ESD testing, contact discharge and air-gap discharge. Contact discharge calls for a direct connection to the unit being tested. Air-gap discharge uses a higher test voltage but does not make direct contact with the unit under test. With air discharge, the discharge gun is moved toward the unit under test, developing an arc across the air gap, hence the term air-discharge. This method is influenced by humidity, temperature, barometric pressure, distance and rate of closure of the discharge gun. The contact-discharge method, while less realistic, is more repeatable and is gaining acceptance and preference over the air-gap method. Although very little energy is contained within an ESD pulse, the extremely fast rise time, coupled with high voltages, can cause failures in unprotected semiconductors. Catastrophic destruction can occur immediately as a result of arcing or heating. Even if catastrophic failure does not occur immediately, the device may suffer from parametric degradation, which may result in degraded performance. The cumulative effects of continuous exposure can eventually lead to complete failure. I-O lines are particularly vulnerable to ESD damage. Simply touching or plugging in an I-O cable can result in a static discharge that can damage or completely destroy the interface product connected to the I-O port. It is extremely important, therefore, to have high levels of ESD protection on the I-O lines. It is possible that the ESD discharge could induce latchup in the device under test, so it is important that ESD testing on the I-O pins be carried out while device power is applied. This type of testing is more representative of a real-world I-O discharge where the equipment is operating normally when the discharge occurs. -8- REV. A
Table III. Receiving Truth Table
Receiving Inputs RE 0 0 0 1 DE X X X X A-B > +0.2 V < -0.2 V Inputs O/C X Outputs RO 1 0 1 Hi-Z
ADM3485E
100% 90%
Four severity levels are defined in terms of an open-circuit voltage as a function of installation environment. The installation environments are defined as 1. 2. 3. 4. Well-Protected Protected Typical Industrial Severe Industrial
V
36.8%
10%
IPEAK
t tRL tDL
TIME t 300ms V 5ns 16ms
Figure 21. Human Body Model Current Waveform
Table IV. ESD Test Results
ESD Test Method IEC1000-4-2: Contact
I-O Pins 8 kV
0.2/0.4ms
50ns
t
100% 90%
Figure 23. IEC1000-4-4 Fast Transient Waveform
Table V shows the peak voltages for each of the environments.
IPEAK
Table V. Peak Voltages
Level 1 2 3 4
V PEAK (kV) PSU 0.5 1 2 4
VPEAK (kV) I-O 0.25 0.5 1 2
10% 0.1 TO 1ns 30ns 60ns TIME t
Figure 22. IEC1000-4-2 ESD Current Waveform
FAST TRANSIENT BURST IMMUNITY (IEC1000-4-4)
A simplified circuit diagram of the actual EFT generator is illustrated in Figure 24.
IEC1000-4-4 (previously 801-4) covers electrical fast-transient/ burst (EFT) immunity. Electrical fast transients occur as a result of arcing contacts in switches and relays. The tests simulate the interference generated when, for example, a power relay disconnects an inductive load. A spark is generated due to the well known back EMF effect. In fact, the spark consists of a burst of sparks as the relay contacts separate. The voltage appearing on the line, therefore, consists of a burst of extremely fast transient impulses. A similar effect occurs when switching on fluorescent lights. The fast transient burst test, defined in IEC1000-4-4, simulates this arcing and its waveform is illustrated in Figure 23. It consists of a burst of 2.5 kHz to 5 kHz transients repeating at 300 ms intervals. It is specified for both power and data lines.
HIGH VOLTAGE SOURCE
RC CC
L
RM CD ZS
50 OUTPUT
Figure 24. EFT Generator
These transients are coupled onto the signal lines using an EFT coupling clamp. The clamp is 1 m long and completely surrounds the cable, providing maximum coupling capacitance (50 pF to 200 pF typ) between the clamp and the cable. High energy transients are capacitively coupled onto the signal lines. Fast rise times (5 ns) as specified by the standard result in very effective coupling. This test is very severe since high voltages are coupled onto the signal lines. The repetitive transients can often cause problems, where single pulses do not. Destructive latchup may be induced due to the high energy content of the transients. Note that this stress is applied while the interface products are powered up and are transmitting data. The EFT test applies hundreds of pulses with higher energy than ESD. Worst case transient current on an I-O line can be as high as 40 A.
REV. A
-9-
ADM3485E
Test results are classified according to the following 1. Normal performance within specification limits. 2. Temporary degradation or loss of performance that is selfrecoverable. 3. Temporary degradation or loss of function or performance that requires operator intervention or system reset. 4. Degradation or loss of function that is not recoverable due to damage.
APPLICATIONS INFORMATION Differential Data Transmission Cable and Data Rate
The transmission line of choice for RS-485 communications is a twisted pair. Twisted pair cable tends to cancel common-mode noise and also causes cancellation of the magnetic fields generated by the current flowing through each wire, thereby reducing the effective inductance of the pair. The ADM3485E is designed for bidirectional data communications on multipoint transmission lines. A typical application showing a multipoint transmission network is illustrated in Figure 23. Only one driver can transmit at a particular time, but multiple receivers may be enabled simultaneously. As with any transmission line, it is important that reflections are minimized. This may be achieved by terminating the extreme ends of the line using resistors equal to the characteristic impedance of the line. Stub lengths of the main line should also be kept as short as possible. A properly terminated transmission line appears purely resistive to the driver.
Receiver Open-Circuit Fail-Safe
Differential data transmission is used to reliably transmit data at high rates over long distances and through noisy environments. Differential transmission nullifies the effects of ground shifts and noise signals that appear as common-mode voltages on the line. Two main standards are approved by the Electronics Industries Association (EIA) which specify the electrical characteristics of transceivers used in differential data transmission. The RS-422 standard specifies data rates up to 10 MBaud and line lengths up to 4000 ft. A single driver can drive a transmission line with up to 10 receivers. The RS-485 standard was defined to cater to true multipoint communications. This standard meets or exceeds all the requirements of RS-422, but also allows multiple drivers and receivers to be connected to a single bus. An extended commonmode range of -7 V to +12 V is defined. The most significant difference between RS-422 and RS-485 is the fact that the drivers may be disabled thereby allowing more than one to be connected to a single line. Only one driver should be enabled at a time, but the RS-485 standard contains additional specifications to guarantee device safety in the event of line contention.
The receiver input includes a fail-safe feature that guarantees a logic high on the receiver when the inputs are open circuit or floating. Table VI. Comparison of RS-422 and RS-485 Interface Standards Specification Transmission Type Maximum Cable Length Minimum Driver Output Voltage Driver Load Impedance Receiver Input Resistance Receiver Input Sensitivity Receiver Input Voltage Range RS-422 Differential 4000 ft. 2 V 100 4 k min 200 mV -7 V to +7 V RS-485 Differential 4000 ft. 1.5 V 54 12 k min 200 mV -7 V to +12 V
-10-
REV. A
ADM3485E
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
8-Lead Plastic DIP (N-8)
0.430 (10.92) 0.348 (8.84)
8 5
0.280 (7.11) 0.240 (6.10)
1 4
PIN 1 0.210 (5.33) MAX 0.160 (4.06) 0.115 (2.93)
0.060 (1.52) 0.015 (0.38) 0.130 (3.30) MIN SEATING PLANE
0.325 (8.25) 0.300 (7.62) 0.195 (4.95) 0.115 (2.93)
0.022 (0.558) 0.100 0.070 (1.77) 0.014 (0.356) (2.54) 0.045 (1.15) BSC
0.015 (0.381) 0.008 (0.204)
8-Lead SOIC (SO-8)
0.1968 (5.00) 0.1890 (4.80)
8 5 4
0.1574 (4.00) 0.1497 (3.80) PIN 1
1
0.2440 (6.20) 0.2284 (5.80)
0.0500 (1.27) BSC 0.0098 (0.25) 0.0040 (0.10) SEATING PLANE 0.0688 (1.75) 0.0532 (1.35) 0.0192 (0.49) 0.0138 (0.35) 8 0.0098 (0.25) 0 0.0075 (0.19)
0.0196 (0.50) 0.0099 (0.25)
45
0.0500 (1.27) 0.0160 (0.41)
REV. A
-11-
PRINTED IN U.S.A.
C3338-0-5/00 (rev. A) 00075

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